View L6374FPT_5559053.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

march 2008 rev 3 1/19 19 l6374 industrial quad line driver features four independent line drivers with 100 ma up to 35 v outputs input signals between - 7 v and + 35 v, with pre-setting threshold push-pull outputs with three state control and true zero current between vs and ground current limiting on each output effective in the full "ground to vs" output voltage range output voltage clamp to vs and to ground overtemperature and undervoltage protections diagnostic for overtemperature, undervoltage and overcurrent pre-setting delay for overcurrent diagnostic high speed operation: up to 300 khz with 35 v swing description the l6374 is especially designed to be used as a line driver in industrial control systems based on the 24 v signal levels ( iec 61131 , 24vdc). table 1. device summary order codes package packaging l6374fp so-20 tube L6374FPT so-20 tape and reel so-20 figure 1. block diagram www.st.com
contents l6374 2/19 contents 1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 rthjp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 rthja1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.3 rthja2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 overtemperature protection (ovt) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 undervoltage protection (uv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 diagnostic logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8 programmable delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 analog inputs (i1,i2,i3,i4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 10 state / push-pull input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 11 the switching of the output stag e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 application note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
l6374 maximum ratings 3/19 1 maximum ratings 2 pin connections figure 2. pins connection (top view) table 2. absolute maximum ratings symbol pin parameter value unit v s 1 supply voltage (t w 10 ms) 50 v supply voltage (dc) 40 v v ilog 12, 13 logic input voltage (dc) -0.3 to 7 v i ilog logic input forced current, per pin 1ma i i 7, 8, 9, 10 channel input current (forced) 2ma v i channel input voltage - 7 to 35 v i out 3, 4, 17, 18 output current (forced, apart from inductive load) 100 ma output current (forced, apart from inductive load) same t w 10 ms 1a v out output voltage (forced, not resulting from an inductive kick) -0.3 to v s +0.3 v i set 11 setting pin forced current 1ma v set setting pin forced voltage -0.3 to 5 v v diag 14 external voltage -0.3 to 35 v i diag externally forced current -10 to 10 ma v c3 13 voltage on the delay capacitor, externally forced -0.3 to 4.5 v t op ambient temperature, operating range -25 to 85 c t j junction temperature, operating range (see overtemperature protection) -25 to 125 c t stg storage temperature -55 to 150 c
electrical characteristics l6374 4/19 3 electrical characteristics table 3. electrical characteristics symbol pin parameter test condition min typ max unit dc operation (v s = 24 v; t j = -25 to 125 c; unle ss otherwise specified) v s 1 supply voltage 10.8 35 v v sh uv upperthreshold 9 10.8 v h ys1 uv hysteresis 250 450 650 mv i qsc quiescent current outputs open 3 5 ma v ref 11 input comparators reference voltage reference pin floating 1.05 1.25 1.35 v i ref sink/source current on reference pin v ref = 0 v -30 -20 -10 a v ref = 5 v 10 20 30 a v th 7, 8, 9, 10 comparator threshold with external bias v s = 9 to 12 v -0.2 2.0 v v s = 12 to 35 v -0.2 5.0 v v il input low level v ref externally biased -7 v ref -0.2 v pin v ref floating -7 0.8 v v ih input high level v ref externally biased v ref +0.2 35 v pin v ref floating 2 35 v v i input voltage (operative range) -7 35 v i bias input bias current 0 < v i < v s -1 1 a v i = -7 v -1 -0.5 -0.1 ma hys 2 input comparators hysteresis see a nalog inputs sections 100 200 350 mv t h ovt upper threshold 170 c h t ovt hysteresis 20 c i sc 3, 4, 17, 18 current limit v i = -7 to v s ; v out = 0 to v s ; 110 200 300 ma v on internal voltage drop @ rated current i out = 100ma; sourced @ high output, sunk @ low output t j = 125 c 400 600 mv same, t j = 25 c 250 400 mv i lkg output 3-state leakage current v out = 0 to v s -25 25 a v in 12 push-pull mode request -0.2 0.8 v 3-state mode request 2 5.5 v i in input current v i = 0 v 10 25 a i dlkg 14 diagnostic output leakage diagnostic off; v diag = 24 v 5 a v diag diagnostic output voltage drop i diag = 5 ma 200 500 mv
l6374 electrical characteristics 5/19 ac operation (v s = 10.8 to 35 v; t j = -25 to 125 c; i out = 100 ma; unless otherwise specified; see switching waveforms diagrams) t dr 7 to 4 8 to 3 9 to181 0 to 17 delay time on rising edge r l to ground 1000 1500 ns r l to v s 500 1000 ns t df delay time on falling edge r l to ground 500 1000 ns r l to v s 1000 1500 ns t r 3, 4, 17,18 rise time r l to ground 120 250 ns r l to v s 120 250 ns t f fall time r l to ground 150 300 ns r l to v s 150 300 ns table 3. electrical characteristics (continued) symbol pin parameter test condition min typ max unit
thermal characteristics l6374 6/19 4 thermal characteristics 4.1 r thjp the reference point is the knee on the four central pins, where the pins are upwardly bent and the soldering joint with the pcb footprint can be made. 4.2 r thja1 if a dissipating surface, thick at least 35 m, and with a surface similar or bigger than the one shown, is created making use of the pr inted circuit. such heatsinking surface is considered on the bottom side of an horizontal pcb (worst case). 4.3 r thja2 if the power dissipating pins (the four central ones), as well as the others, have a minimum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the pcb itself. it is the same situation of point above, without any heatsinking surface created on purpose on the board. table 4. thermal data symbol parameter value unit r thjp thermal resistance, junction to pin 17 c/w r thja1 thermal resistance, junction to ambient (see thermal characteristics) 65 c/w r thja2 thermal resistance, junction to ambient (see thermal characteristics) 80 c/w
l6374 thermal characteristics 7/19 figure 3. printed heatsink
overtemperature protection (ovt) l6374 8/19 5 overtemperature protection (ovt) if the chip temperature exceeds t h (measured in a central position in the chip) the chip deactivates itself. the following actions are taken: all the output stages are forced in the "three state" condition, i.e. are disconnected from the output pins; only the clamping diodes at the outputs remain active; the signal diag is activated (active low). normal operation is resumed as soon as (typically after some seconds) the chip temperature monitored goes back below t h -h t . the different upper and lower thresholds with hysteretic behavior, assure that no intermittent conditions can be generated. 6 undervoltage protection (uv) the supply voltage is expected to range from 11 v to 35 v, even if its reference value is considered to be 24 v. in this range the l6374 operates correctly. below 10.8 v the overall system has to be considered not reliable. consequently the supply voltage is monitored continuously and a signal, called uv, is internally generated and used. the signal is "on" as long as the supply volt age does not reach the upper internal threshold of the v s comparator (called v sh ). the uv signal disappears above v sh . once the uv signal has been removed, the supply voltage must decrease below the lower threshold (i.e. below v sh -h ys1 ) before it is turned on again. the hysteresis h ys1 is provided to prevent intermittent operation of the device at low supply voltages that may have a superimposed ripple around the average value. the uv signal inhibits the outputs, putting them in three-state, but has no effect on the creation of the reference voltages for the internal comparators, nor on the continuous operation of the charge-pump circuits.
l6374 diagnostic logic 9/19 7 diagnostic logic the situations that are monitored and signalled with the diag output pin are: current limit (ovc) in action; there are 8 individual current limiting circuits, two per each output, i.e. one per every output transistor; they limit the current that can be either sour- ced or sunk from each output, to a typical value of 150 ma, equal for all of them; undervoltage protection (uv); overtemperature protection (ovp); the diagnostic signal is transmitted via an open drain output (for ease of wired-or connection of several such signals) and a low level represents the presence of at least one of the monitored conditions, mentioned above. 8 programmable delay the current limiting circuits can be requested to perform even in absence of a real fault condition, for a short period, if the load is of ca pacitive nature or if it is a filament lamp (that exhibits a very low resistance during the initial heating phase). to avoid the forwarding of misleading, short diagnostic pulses in coincidence with the intervention of the current limiting circuits when operating on capacitive loads, a delay of about 5 s is inserted on the signal path, between the "or" of the current limit signals and its use as external diagnostic. it takes about 1 s to charge (or discharge) by 24 v a capacitor of 5 nf with a current of 120 ma . to implement longer delays (from the intervention of one of the current limiting circuits to the activation of the diagnostic) an external capacitor can be connected between pin c3 and ground (pin c3 is otherwise left open). the delay shall then be determined by the ratio of about 10 pf/ s, using the value of the capacitance connected to the pin. 9 analog inputs (i1,i2,i3,i4) the input stage of each channel is a high im-pedence comparator with built-in hysteresis (200 mv) for high noise immunity. each comparator has one input connected to all the others and tied to a common pin ref (pin 11). if this pin is left floating an internal precise band gap voltage reference (1.25 v) is applied, otherwise these inputs can be externally programmed by connecting an external voltage source (from 0 to 5 v) and the current on this pin is internally limited to 20 ma. the other input pin of each comparator can swing from -7 to 35 v. for this reason it has been implemented the structure shown in figure 4 on page 10 and the device can also be used as line receiver. when the input voltage is negative, the current is internally limited by a 15 k ? resistor as shown in figure 4 on page 10 . high and low input thresholds can be obtained by adding and subtracting half of the hysteresis to the voltage of pin ref (see figure 5 on page 10 ).
state / push-pull input l6374 10/19 10 state / push-pull input the input 3st/pp is instead intended for a digital incoming signal. it has an internal threshold set at 1.26 v; an internal bias circuit (10 ma typical) simulates a high level (three-state) if the pin is disconnected. figure 4. equivalent input circuit figure 5. input comparator threshold v ref v i v s v out h ys2 h ys2 22 d94in073
l6374 the switching of the output stage 11/19 11 the switching of the output stage the cross conduction of the two transistors of an output stage of the l6374 would be significantly noisy, because the transistor s here can carry peak currents in excess of 100 ma, and even more in the few nanoseconds be fore the current limiting circuits are really effective. consequently the device has been designed so as to avoid such cross conduction. at every switching transition, first of all the transistor in conduction is turned off. then, after a safe interval of around 200 ns, the other transistor is turned on. when analyzing the switching cycle, and the associated switching times, it is useful to identify some subsequent phases: delay from the input pin to the output reaction; off transition in the output stage; dead time on transition in the output stage. figure 6. v s = 35 v, 350 ? connected to v s /2. figure 6 helps understand such sequence. in fact, with a purely resistive load connected to v s /2 no parasitic elements interfere significantly. the waveform can be significantly less easy to in terpret if the load has not the perfect symmetry of that case, as showed below. for instance, it is enough to connect the resistive load to ground, or to v s ? as figure 7 and figure 8 ? show to hide some of the switching phases described. if the load is connected to ground, the waveform stays stuck to ground as long as the output stage is in high impedance; vi ceversa when the load is conn ected to vs the waveform will linger close to the supply voltage as long as possible. if an output load made of an inductor and a resistor in series is used, the inductive kick at the beginning of every output transition generates the equivalent effect of an "anticipated"
the switching of the output stage l6374 12/19 switching when the inductor can discharge; while the switching looks "delayed" if the output transition tends to initiate a charging phase (see figure 9 ). with a load almost free from parasitic elements, the waveforms resemble the ones of the purely resistive cases. with a real, more composite load, the effect of the inductive kick in comparison to the resistive load, would be more apparent. with a capacitor and a resistor in parallel as a load, another type of waveform can be seen (reported in figure 10 ). as long as the output stage stays in the transient high impedance state, the output voltage will follow the classic exponential law of an rc relaxation. as soon as the other transistor is switched on and takes charge, the waveform is quickly forcibly brought to its steady state value. from the above it is possible to see how the switching times, inherently very fast, of the output stages, may be difficult to identify in a waveform if the output load is not accurately taken into consideration. figure 11 show typical switching waveform for inputs and outputs. figure 7. v s = 35 v, 350 ? connected to ground
l6374 the switching of the output stage 13/19 figure 8. v s = 35 v, 350 ? connected to v s figure 9. v s = 35 v, 350 ? and 1 mh connected to ground.
the switching of the output stage l6374 14/19 figure 10. v s = 35 v, 350 ? || 1 nf connected to ground. figure 11. switching waveforms. 50% 50% t df t dr t 90% 90% 10% 10% t f t r t in out d94in074
l6374 application note 15/19 12 application note it is recommended not to leave the ref pin (pin 11) floating: if not used with an external voltage reference, it is better to connect an external capacitor (of at least 10 nf) between this pin and ground. this capacitor filters the voltage reference against voltage spikes that can be generated by the commutation of the output stages. this is very common using capacitive loads: in fact, the initial transient of such loads behaves like a short circuit, so the current flowing through the outputs presents very high spikes. moreover, if the device is used as a line receiver. (i.e. the input signals can go below ground) it is required not to leave the ref pin (pin 11) floating: in this case, the pin can be connected to ground or to a fixed external voltage reference.
package mechanical data l6374 16/19 13 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect . the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
l6374 package mechanical data 17/19 table 5. so-20 mechanical data figure 12. package dimensions dim. mm inch min typ max min typ max a 2.35 2.65 0.093 0.104 a1 0.1 0.3 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 12.6 13 0.496 0.512 e 7.4 7.6 0.291 0.299 e 1.27 0.050 h 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.4 1.27 0.016 0.050 k 0 (min.)8 (max.)
revision history l6374 18/19 14 revision history table 6. document revision history date revision changes august 2003 1 first issue june 2004 2 technical migration from st-press to edocs. 03-mar-2008 3 modified: removed obsolete package dip-20
l6374 19/19 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

▲Up To Search▲

Price & Availability of L6374FPT

	To Download L6374FPT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .